Gtk-Message: 17:54:42.677: Failed to load module "canberra-gtk-module"

vlsi
1

I face this problem while converting one of the file from svg to eps in inkscape. I am using ubuntu 20.04
I wrote the following command :

inkscape graphfinal.svg -E graphfinal.eps

I got the following message:
Gtk-Message: 17:54:42.677: Failed to load module “canberra-gtk-module”

After searching on google, I found the following install command which solved my problem.

sudo apt-get install libcanberra-gtk-module

After running it,

inkscape graphfinal.svg -E graphfinal.eps

runs fine.

1 Like
2

IMG-20200726-WA0010
IMG-20200726-WA00101040×588 78.1 KB

This is the output of ptl logic. The output waveforms are okay but why is the voltage only going till 0.7? Can you please help me look for the issue here? It’ll be a pleasure of mine, ma’am.

3

Hello,
The output is not sufficient to tell the issue.
Please provide a small piece of code and the CMOS technology you are using.
By the time just check Wp/Wn ratio. It should be around 2.5.
Also, please post the query in the appropriate forum so that it becomes easy to track.
Smita

4

.include 16nmHP.pm
.param psu = 0.9V
.param len = 16n
.param wpmos=200n wnmos=50n

vsupply vdd 0 {psu}
vgnd vss 0 0V

*Inputs to transistors

vinb vb vss PULSE(0 {psu} 2NS 2NS 2NS 50NS 100NS)
vina va vss PULSE(0 {psu} 2NS 2NS 2NS 25NS 160NS)

*inverter of control signal
Mpa vabar va vdd vdd pmos l={len} w={wpmos} ; pmos
Mna vabar va vss vss nmos l={len} w={wnmos} ; nmos

Mpb vbbar vb vdd vdd pmos l={len} w={wpmos} ; pmos
Mnb vbbar vb vss vss nmos l={len} w={wnmos} ; nmos

*Final D1 PTL
Mn1 vd1 vb va vss nmos l={len} w={wnmos} ; nmos
Mn2 vd1 vbbar vb vss nmos l={len} w={wnmos} ; nmos

*Final D2 PTL
Mn3 vd2 vbbar va vss nmos l={len} w={wnmos} ; nmos
Mn4 vd2 vb vss vss nmos l={len} w={wnmos} ; nmos

Cload6 vd2 vss6 50f
vdc6 vss6 vss dc 0V

Cload7 vd1 vss7 50f
vdc7 vss7 vss dc 0V

.options method=gear reltol=0.1m
.tran 0.1n 200n 0 0.1n
.save all @vsupply[p]

.control
run

set filetype = ascii

plot v(va) v(vb) v(vd2) v(vd1)
.endc
.End

This is the code, ma’am. Sorry for this time but I’ll keep this in my mind from next time.

5

Hello,
NMOS is good at passing a 0, but poor at charging a node to Vdd. When the pass transistor a node high, the output only charges up to Vdd-Vth.
Thanks
Smita

6

Ma’am, Is there any way the output could charge upto Vdd? You have been of great help. Thankyou so much, ma’am.

7

Hello,
You can use transmission gates composed of both nmos and pmos pass transistors.
Smita